6-Layer PCB Stackup Design
How to Route Signals
Before you start routing, let’s look at the typical PCB stackup you would use in a 6-layer PCB:
In this stackup, the top and bottom layers are on thin dielectrics, so these layers should be used for impedance controlled signals. 10 mil is probably the thickest dielectric you should use because this will require microstrip routing with 15-20 mil width, depending on dielectric constant. If you’re routing a digital interface with differential pairs, the spacing will also allow a reduced trace width, which will allow you to route into finer pitch components. Just as an example, we have used a version of the above stackup for many of our small form factor networking products that support multiple multi-gigabit Ethernet channels.
If you need to use much smaller trace widths on the outer layers, just decrease the outer dielectric thicknesses (maybe as low as 4-5 mil), and then add some thickness to the L3-L4 dielectric so that you hit your board thickness target. The next point to consider is how to route power.
How to Route Power
In the above 6-layer PCB stackup example, there is an entire layer dedicated to PWR. This is generally a good practice in a 6-layer PCB as it frees up area on the surfaces for components, and it will be easier to get power to these components through vias.
Just as an example, take a look at the BGA shown below. This particular BGA is typical of a high speed interface controller that requires a lot of current at multiple voltages, so a lot of the balls will be connected to power and ground. In something like an FPGA, you might find multiple pins for power and ground throughout the footprint. Dedicating a single layer to power lets you break up the plane into rails so that multiple voltages can be used at high current if necessary. This way, you would not need to overlap these rails at different voltages, which prevents an additional EMI problem.
Note that, just because you placed power on an internal layer, that doesn’t mean you can’t put power elsewhere. You can still route power on your other signal layers as rails using copper pour, or as thick traces.
If you need high current operation in a 6-layer board, possibly at multiple voltages, I would recommend using an additional power layer instead of the additional signal layer. In other words, you’ll have two power layers interleaved with ground on the internal layers inside the stackup. You could even go a step further and put a power plane on the back layer for even more current handling capabilities. This would give you enough room to route power over a large area, possibly with heavier copper, to ensure low DC resistance and low power loss.
Aside from these points, the other important routing strategies used in a 4-layer or 8-layer board to ensure EMC will also apply in a 6-layer board. If you use something similar to the above example 6-layer stackup, you will have a much easier time of routing and ensuring signal and power integrity. The same DFM considerations in a 4-layer or 8-layer board will also apply in a 6-layer board; get your stackup approved by a fabrication house before you start creating your layout, sizing traces, and routing.